1. Field of the Invention
The present invention generally relates to an electronic iris control circuit for a CCD (charge-coupled device) video camera. More specifically, this invention relates to an electronic iris control circuit in which an average value of a video signal based on signal charges, accumulated in a plurality of pixels of a solid state imaging device and sequentially transferred, is detected, a detected value of the average value of the video signal and a comparison reference value are compared with each other by one or a plurality of comparing circuits to detect one of a plurality of separated regions, which result from separating a maximum value and a minimum value, to which the detected value belongs and a timing at which a shutter pulse for discharging the signal charges from the respective pixels of the solid state imaging device is supplied is controlled on the basis of a detected result to thereby control a signal charge accumulation time period of each pixel.
2. Description of the Prior Art
Conventional solid state image sensors, e.g., CCD solid state image sensors are designed so as to discharge a signal charge accumulated in each of photo-electric converting elements within the solid state imaging device to an overflow drain region or to a semiconductor substrate side by the application of a shutter pulse. An exposure time of such solid state image sensor also can be changed by adjusting a charge accumulation time within a field period by the application of the shutter pulse.
The charge accumulation time is controlled by the shutter pulse at the unit of 1H (H is the horizontal period) because a timing at which the shutter pulse is applied is limited to a horizontal blanking period. The application timing of the shutter pulse is limited to the horizontal blanking period in order to avoid a noise from entering a video signal.
One video camera using such solid state imaging device effectively utilizes such electronic shutter function thereof to control its iris.
FIG. 1 of the accompanying drawings shows a conventional electronic iris control circuit. FIG. 2 is a timing chart used to explain operation of the electronic iris control circuit shown in FIG. 1.
In FIG. 1, reference numeral 1 designates a lens, 2 a solid state imaging device, 3 a sample and hold (S/H) circuit which samples and holds an output from the solid state imaging device 2, 4 an AGC (automatic gain control) circuit, 5 a gamma-correcting circuit, 6 a white level clipping circuit and 7 a clamping circuit.
There is shown an example of a conventional electronic iris control circuit that is generally depicted by reference numeral 8a in FIG. 1. As shown in FIG. 1, the electronic iris control circuit 8a comprises a low-pass filter (LPF) 9 which integrates the output of the sample and hold circuit 3, comparing circuits 10a, 10b and a shutter control circuit 11.
The low-pass filter 9 is adapted to detect a brightness (average brightness) of the whole screen by integrating the output of the sample and hold circuit 3. The comparing circuits 10a and 10b are adapted to determine by comparing a detected value of such brightness with different reference values V1, V2 whether the detected value is larger than the reference value V1, the detected value falls between the reference values V1 and V2 or whether the detected value is smaller than the reference value V2. The shutter control circuit 10 is adapted to increase a shutter speed when the output of the low-pass filter 9 is higher than the reference value V1 and to decrease the shutter speed when the output of the low-pass filter 9 is lower than the reference value V2. When the output of the low-pass filter 9 is lower than the reference value V1 and higher than the reference value V2, the shutter speed is not changed.
In FIG. 2, reference symbol V.sub.BLK depicts a vertical blanking signal, X.sub.SG1 a read-out signal (ROG), HD a horizontal synchronizing signal and X.sub.sub(1) to Xs .sub.sub(n) depict shutter pulses representative of discharge commands in the respective examples which will be described later.
The exposure time of the solid state imaging device is longest in the case of the shutter pulse X .sub.sub(x), and can be changed at the unit of horizontal period such as X.sub.sub(2), X.sub.sub(3), X.sub.sub(4), . . . The exposure time covers a time period starting from a time point at which the final pulse of shutter pulses generated at every horizontal period after the read-out signal X.sub.SG1 was produced to a time point at which the next read-out signal X.sub.SG1 is generated. Then, the shutter pulse is inhibited from being generated during the vertical blanking period in the prior art. Therefore, the exposure time is 1/1500 second when the iris is made largest and an iris dynamic range in the prior art falls in a range of from 1/60 second to 1/1500 second.
Meanwhile, the iris dynamic range falls in a range of from 1/60 second to 1/1500 second in the prior art as described above. However, a request for widening the iris dynamic range cannot be satisfied in the prior art. If the iris dynamic range is widened, when intensity of light irradiated on the solid state imaging device is high, then a so-called hunting occurs in the iris control operation. This hunting will be described more fully below.
While the electronic iris control circuit controls the shutter such that an average value of the output signal from the solid state imaging device becomes constant, if a width in which the output signal is changed by the control of exposure time is larger than a width of dead zone of the iris control system, then it is unavoidable that the hunting occurs. Then, the shorter the exposure time becomes, the larger the level of the output signal of the solid state imaging device is changed per the change of exposure time of one step is changed. Accordingly, if intensity of light irradiated on the solid state imaging device is larger, then the hunting occurs.
The shutter pulse X.sub.sub(1) shown in FIG. 2 will be described by way of example. In this case, a rate with which the exposure time is changed when the exposure time is reduced by one unit time, i.e., a shutter gain difference {[exposure time (1)--exposure time (2)]/exposure time (1)} is very small.
However, when the exposure time becomes very short, i.e., nearly 1/1500 second, a denominator of the shutter gain difference=[exposure time (n)--exposure time (n+1)]/exposure time (n), which is the equation for obtaining the shutter gain difference, becomes very small while its numerator is constant (i.e., 1H). A ratio between the maximum value and the minimum value of the shutter gain differences becomes about 10:1.
Because, the frequency of 1H is 15734 Hz and hence the time unit in which the exposure time can be changed is 1/15734 second while a time at which the read-out signal S.sub.SG1 occurs after the vertical blanking period was started (i.e., this time is nearly equal to the maximum exposure time in the prior art) is 1/1500 second. If the output signal from the solid state imaging device is changed considerably by shifting the exposure time by one unit time as described above, then the hunting occurs unavoidably. As a result, the shutter gain difference become maximum immediately after the vertical blanking period was ended. To prevent the hunting from occurring even when the shutter gain difference is maximum (substantially 10%), a dead zone width is set in the prior art. However, if it is intended that the shutter pulse occurs even in the vertical blanking period in order to widen the dynamic range, then the shutter gain difference becomes considerably large because the frequency of the shutter pulse is set to 15734 Hz constantly. Therefore, the hunting occurs.
For this reason, the conventional maximum shutter speed is limited to 1/1500 second and the iris dynamic range is limited in a range of from 1/60 second to 1/1500 second.
Further, in order to avoid the hunting, a dead zone is set in the prior art as shown in FIG. 3. To be more concrete, as a reference value used when the output from the low-pass filter 9 is compared with the reference value, there are set two reference values, i.e., an upper reference value V1 and a lower reference value V2. If the output from the low-pass filter 9 is higher than the upper reference value V1, then the shutter speed is increased. If the output from the low-pass filter 9 is lower than the lower reference value V2, then the shutter speed is decreased. If the output from the low-pass filter 9 lies between the reference values V1 and V2, the shutter speed is not changed. Thus, the dead zone is set.
The width of the dead zone, i.e., V1-V2 is made constant regardless of the duration of the charge accumulation time. More specifically, the width of the dead zone is set to a value commensurate with the maximum value of the shutter gain difference in the vertical scanning period, i.e., the shutter gain difference (10%) provided Just before the vertical blanking period is started.
In the conventional electronic iris control circuit, the width of the dead zone is set regardless of the duration of the charge accumulation time. There is then the problem that a sensitivity in the iris control operation is lowered unnecessarily when the charge accumulation time is reduced more.
That is to say, the dead zone width must be increased in accordance with the increase of the shutter gain difference or else the hunting occurs. Consequently, it is unavoidable that the dead zone width is increased in the portion where the shutter gain difference is large, i.e., the charge accumulation time is short.
The dead zone width might be narrow if the shatter gain difference is small. In the prior art, however, the dead zone width is made wide in accordance with the maximum value of the shutter gain difference, and the dead zone width is unnecessarily wide in the portion in which the shutter gain difference is small.
If the dead zone width is unnecessarily wide, a sensitivity is lowered uselessly, which unavoidably causes a large error to be produced in the level of the output signal from the solid state imaging device. The reason for this is as follows. Even though the dead zone has the width, it is customary that a target value of the output signal level of the solid state imaging device, i.e., an ideal converging value is a central value between the upper reference value V1 and the lower reference value V2. Besides, the iris cannot be controlled in the range of the dead zone. There is then the possibility that the output signal from the solid state imaging device is set to a level relatively largely distant from the target value. In other words, the dead zone width serves also as the error range so that, if the dead zone width is widened unnecessarily, then it is unavoidable that the error range is widened unnecessarily. Therefore, the level of the video signal must be kept constant by the succeeding AGC circuit 4 and the AGC circuit 4 of high efficiency is indispensable for the conventional iris control circuit.
Furthermore, according to the conventional electronic iris control circuit, the iris is controlled by decreasing or increasing the exposure time by one horizontal period each during the vertical scanning period. There is then the problem that an optimum exposure is realized with plenty of time, i.e., that a response speed is low.
More specifically, the range that the iris can be controlled in the vertical scanning period falls in a range of from 1/60 second to 1/1500 second and about 254 steps are contained in the above iris controllable range. If it is intended that the exposure time is changed from one to the other end of such iris controllable range, then only 60 steps are changed per second. Therefore, it takes about 4.2 seconds to reach the optimum iris. That is to say, the iris is not changed substantially by one step in the darkness and the response speed becomes very low.
In the conventional electronic iris control circuit shown in FIG. 1, as shown in FIG. 2, the comparing circuits 10a, 10b are constantly operated. If the output from the low-pass filter 9 is changed regardless of the vertical blanking period and the vertical effective period, then the outputs from the comparing circuits 10a, 10b can be changed. The change of this output represents a large and severe change of an amplitude between Vcc (e.g., 5 V) and 0 V. This change causes a crosstalk that exerts a seriously bad influence upon a video signal of very small level, whereby a noise is produced on the picture screen and a picture quality is deteriorated.